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PSA: Quad channel RAM kit users

gupsterg
Level 13
Information in image, the source post.
Intel Defector :eek: AMD Rebel


R9 5900X - Custom WC - ASUS Crosshair VII Hero WiFi - Ballistix Sport LT 2x16GB 3800MHz C16 - RX 6800 XT - WD SN770 2TB - 2x 870 EVO 4TB


24/7 OC: i5 4690K @ 4.9GHz CPU@1.255v 4.4GHz Cache@1.10v - Archon SB-E X2 - Asus Maximus VII Ranger
Sapphire Fury X (1145/545 ~17.7K GS 3DM FS)

:eek: CPU Validation 5.198GHz@1.314v with 4.4GHz cache + RAM 2400MHz@1T :eek:
Da Music video
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14 REPLIES 14

Arne_Saknussemm
Level 40

gupsterg
Level 13
Indeed 🙂 . The Stilt, Elmor, Praz and Raja, have really shared alot on ZEN. I have not noted any other vendors as active as ASUS have been on this front on OCN.
Intel Defector :eek: AMD Rebel


R9 5900X - Custom WC - ASUS Crosshair VII Hero WiFi - Ballistix Sport LT 2x16GB 3800MHz C16 - RX 6800 XT - WD SN770 2TB - 2x 870 EVO 4TB


24/7 OC: i5 4690K @ 4.9GHz CPU@1.255v 4.4GHz Cache@1.10v - Archon SB-E X2 - Asus Maximus VII Ranger
Sapphire Fury X (1145/545 ~17.7K GS 3DM FS)

:eek: CPU Validation 5.198GHz@1.314v with 4.4GHz cache + RAM 2400MHz@1T :eek:
Da Music video

Arne_Saknussemm
Level 40
It's totally true...ASUS FTW on motherboards and BIOS support...just the way it is...a good reason to turn me back to the ZE

Korth
Level 14
I don't quite understand why these timings have channel-specific differences.

I mean, I do understand ... except, doesn't "ASUS T-Topology" make timings on each of the memory channels fully uniform?
"All opinions are not equal. Some are a very great deal more robust, sophisticated and well supported in logic and argument than others." - Douglas Adams

[/Korth]

Arne_Saknussemm
Level 40
Maybe the cpu doesn't have T topology....:confused: (/s/jk ;))

Arne Saknussemm wrote:
Maybe the cpu doesn't have T topology....:confused:



T-Topology is a physical trace design for DRAM topology on certain ASUS boards and has nothing to do with the CPU, Arnold :D. T-Topology the via is placed at the centre point between two slots which ultimately leads to better signal integrity in 4 DIMM or rather 2 DIMMs per channel configurations over the conventionally used daisychain configuration.
13900KS / 8000 CAS36 / ROG APEX Z790 / ROG TUF RTX 4090

gupsterg
Level 13
Mobo has T Topology. This timing oddity maybe AGESA quirk or due to how TR has 2 IMC to support quad channel.

IDK and don't have any further info :o.
Intel Defector :eek: AMD Rebel


R9 5900X - Custom WC - ASUS Crosshair VII Hero WiFi - Ballistix Sport LT 2x16GB 3800MHz C16 - RX 6800 XT - WD SN770 2TB - 2x 870 EVO 4TB


24/7 OC: i5 4690K @ 4.9GHz CPU@1.255v 4.4GHz Cache@1.10v - Archon SB-E X2 - Asus Maximus VII Ranger
Sapphire Fury X (1145/545 ~17.7K GS 3DM FS)

:eek: CPU Validation 5.198GHz@1.314v with 4.4GHz cache + RAM 2400MHz@1T :eek:
Da Music video

Korth
Level 14
I agree that two iMCs seems likely. The iMCs can't be entirely symmetrical, imagine the complexity of implementing a "T-Topology" for uniform signal path lengths within the silicon itself, lol, especially given the constantly varying loads on each of the connected cores.

Not sure what effect AGESA would have. To be honest, I haven't adopted AMD yet and have only a vague understanding of how AGESA really works. Though compensating for AGESA-imposed variances of this sort could be corrected through firmware, yes?
"All opinions are not equal. Some are a very great deal more robust, sophisticated and well supported in logic and argument than others." - Douglas Adams

[/Korth]

Arne_Saknussemm
Level 40
For this price MB better have T+Crumpets topology!