01-26-2021 02:55 PM
01-26-2021 03:27 PM
01-26-2021 03:46 PM
I know that Z490 runs PCIE 4.0 with 11th CPU ONLY "PCIEx16_1 / _2" (x16_1+x16_2 is still limited to 16 lanes overall)
The remaining native pcie_x4_4.0 ssd must be designed from the cpu pcie controller layout,
Only the 500 series chipset can have it.
The z490 m.2 pcb layout design is all towards PCH, not towards CPU PCIE controller.
This is a difference on the physical circuit and cannot be modified from the firmware.