Hey guys,
Never really posted here.
My first motherboard was an OEM Asrock Z370 Pro4-CB. I wanted to upgrade because I couldn't update the motherboard, Cyberpower was never going to release any new updates and the motherboard wouldn't let me update from the Asus / Asrock website. So impulsively after sometime I purchased the Asrog Strix Z390-E Gaming.
I have an i7-8700k / 32 Gigs of DDR4. 4x8 4133MHz.
Ever since I purchased my Z390-E Gaming I've had nothing but issues with my DDR4 Ram.
Needless to say I didn't do enough research prior to purchasing the motherboard.
Not only is the RAM not on the QVL with G. Skill, it is also not on the QVL with Asus.
The ram I'm currently running is F4-4133C19D-16GTZKW Trident Z DDR4-4133MHz CL19-21-21-41 1.35V 16GB (2x8GB).
Running 2 separate kids of the same ram so F4-4133C19D-16GTZKW Trident Z DDR4-4133MHz 4x8GB.
Prior to the upgrade. The OEM Asrock Z370 Pro4-CB ran the ram like a champ believe it or not, it was mind boggling to me after I upgraded the motherboard with what I was thinking was a huge upgrade, to find out that the Z390 can't even run as good of timings as the $160 cyberpower oem board.
Here's my timings and benchmark that the OEM board was stable with.


I've spent over a month trying different timings, loosening timings, tightening timings, raising voltages, lowering voltages. Still not able to get close to what the OEM board could handle / manage.
The reason for this post is
A. Does any one have any advice or solutions that may help? Short of buying new ram or a new motherboard.
B. I found a PDF that explains all the settings and functions of RAM. It is from Micron but they all follow the same basic principles. I remember finding a post awhile back that suggested changing Park CHA and Park CHB to different variables which helped in stabilizing DRAM. And I found a section in the PDF that goes over how NOM, PARK and WR work with RTT. So i'll attach that on this post as well if anyone else is interested in taking a peak.
Here's a link to the pdf.
http://s000.tinyupload.com/file_uploaded.php?file_id=22656587784826823237&del_id=2242515357483305497...Couldn't get an image of it.
Table 71: Termination State Table
Case RTT(Park) RTT(NOM)1 RTT(WR)2 ODT Pin ODT READS3 ODT Standby ODT WRITES A4 Disabled Disabled Disabled Don't Care Off (High-Z) Off (High-Z) Off (High-Z) Enabled Don't Care Off (High-Z) Off (High-Z) RTT(WR) B5 Enabled Disabled Disabled Don't Care Off (High-Z) RTT(Park) RTT(Park) Enabled Don't Care Off (High-Z) RTT(Park) RTT(WR) C6 Disabled Enabled Disabled Low Off (High-Z) Off (High-Z) Off (High-Z) High Off (High-Z) RTT(NOM) RTT(NOM) Enabled Low Off (High-Z) Off (High-Z) RTT(WR) High Off (High-Z) RTT(NOM) RTT(WR) D6 Enabled Enabled Disabled Low Off (High-Z) RTT(Park) RTT(Park) High Off (High-Z) RTT(NOM) RTT(NOM) Enabled Low Off (High-Z) RTT(Park) RTT(WR) High Off (High-Z) RTT(NOM) RTT(WR)
Notes:
1. If RTT(NOM) MR is disabled, power to the ODT receiver will be turned off to save power.
2. If RTT(WR) is enabled, RTT(WR) will be activated by a WRITE command for a defined period time independent of the ODT pin and MR setting of RTT(Park)/RTT(NOM). This is described in the Dynamic ODT section.
3. When a READ command is executed, the DRAM termination state will be High-Z for a defined period independent of the ODT pin and MR setting of RTT(Park)/RTT(NOM). This is described in the ODT During Read section.
4. Case A is generally best for single-rank memories.
5. Case B is generally best for dual-rank, single-slotted memories.
6. Case C and Case D are generally best for multi-slotted memories