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Trained SVID Behavior introduce core clock stretching

noriblis
Level 7

Hello yall!

You probably want my specs, so here they are:
ROG STRIX Z790-F GAMING WIFI updated to microcode 0x129.
13700KF

I just installed this mobo, went into BIOS and set SVID Behavior to Trained, leaving everything else regarding Load Line calibration alone. Ran CB23, and noticed i had core clock stretching. Checked LLC level, and it was default at 4. My AC LL and DC LL were 0.3 AC, 1 DC.

My question is, why does the trained setting not adjust DC to prevent stretching?
This bios setting is broken out of the box.

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