PCIe diagrams for P9X79 WS/Deluxe and R4E...

[mapesdhs]

I'm putting various X79 systems together, deciding on the optimal PCIe slot for an NVMe SSD (SM951, SM961, 960 Pro, etc.), so naturally a spare x16 slot with a direct connection to the CPU would be preferable. Dealing with a P9X79-E WS was easy as I found a connections diagram, ie. the 4th slot (I get over 3GB/sec with a 960 Pro using a 4930K).

Finding the same info for other mbds though has been more difficult. Does anyone have any PCIe connection diagrams for the P9X79 WS, P9X79 Deluxe and R4E? The Deluxe isn't an issue as it only has one GPU, ditto the R4E, but I'd like to know their layouts anyway. The WS though has 2x GTX 980, so I want to work out the best slot for an SM951 256GB.

Thanks!

Ian.

[XIIIIX]

https://www.asus.com/nl/Motherboards/P9X79_WS/HelpDesk_Manual/

https://www.asus.com/nl/Motherboards/P9X79_DELUXE/HelpDesk_Manual/

https://www.asus.com/Motherboards/RAMPAGE_IV_EXTREME/HelpDesk_Manual/

In the expansion-slot explanation you can find the tables.
Good fun experimenting, and keep us informed on the reults.

[mapesdhs]

XIIIIX wrote:
In the expansion-slot explanation you can find the tables.

I have all the original manuals, but alas none of them explain in detail how the various slots are connected, ie. there's nothing akin to this diagram I found which shows, for example, that slot 4 on the E/WS is the one that goes direct to the CPU:

http://images.anandtech.com/doci/7613/Chipset%20Diagram.png

It surprises me that mbd manuals don't come with a PCIe/mbd block diagrams as standard, especially when tech site reviews of the same mbds often do have such diagrams. Of course the above diagram is just for the PCIe slots, but it woudld be good if manuals had an overall diagram aswell.

Even the manunal for my R5E doesn't have such a diagram, which is surprising given the PCIe lane assignment complexities of 28 vs. 40 lane CPUs (an issue even worse with X299). By contrast, Tweaktown's review of the R5E Rev10 did include such diagrams (where did they get the info to put them together?):

http://www.tweaktown.com/reviews/7764/asus-rog-rampage-edition-10-intel-x99-motherboard-review/index...

XIIIIX wrote:
Good fun experimenting, and keep us informed on the reults.

Will do! Before I install the various SSDs in their final system destinations, I want to create a table of results, hopefully by the end of the month. One thing I want to test is whether running PCIe 2.0 vs. 3.0 makes any difference, depending on the SSD model. I'll also test a couple of older mbds, so feel free to hazard a guess as to how a 960 Pro will behave on an ASUS Striker II Extreme. 😄

Ian.

[XIIIIX]

Did some digging, and if I understand correctly, most boards only use lane-splitters, when more PCIE ports are used.

First PCIE3 is X16 almost never via splitter
The others depending on the layout or x8/x4/x2 but still PCIE3

So it depends on how you populate the slots.

The WS is one of the few boards creating "extra"lanes for the extra x16 slots.

[mapesdhs]

Sorry for the delay! I was away for a while...

Yes, I know about the splitters, and the use of PLX chips, etc., but in almost all cases at least one of the non-top-slots is still connected directly to the CPU. Not always true, but usually. Question is, for these boards, which one? There really should be slot map diagrams in the manual just like the one I referenced earlier for the P9X79-E WS.

I've had no luck finding more info on this. Is anyone from ASUS here? Raja, are you there? Can you find out by any chance? Optimised addin-card M.2 awaits the answers. 🙂 My priority atm is the P9X79 WS, but I'd like to find out aswell for the Deluxe, and indeed for the R5E (if the manual for that doesn't have a relevant diagram, not checked yet). I don't think selecting a non-optimal slot would affect bandwidth that much, but it would affect latency, and possibly how the device might behave if it's sharing a link with a GPU or something else via a splitter or PLX (unlike GPUs for gaming, the return path connection is important). And where a GPU is used for compute, it's definitely best if possible for said GPU not to be sharing a connection with an M.2.

Ian.