G.SKILL Trident F3-2666C11Q-32GTXD 4x8GB 32GB on RIVBE w/i7-4930k at 2666MHz

[rosefire]

This is just a quick note describing what worked for me with this memory, since I couldn't find a review or anything written describing success or failure with this memory on an Ivy-E. The following rather conservative settings are stable with various stress tests at 4.375 GHz, XMP memory speed at 2666 MHz, and just over 60C maximum CPU temperatures.

FWIW, prior to installing BIOS 0701 I was only able to get 2400MHz. This could be my fault, but it could also be something changed in the new BIOS. It would be nice if ASUS would post detailed revision histories with their BIOS revisions. 🙂

1. I loaded Optimized Defaults to clear previous settings.
2. Relevant BIOS settings changed after step one were:
- Tuning=XMP (I wish I knew all the settings this changed. At minimum it sets BCLK=strap=125.
- Memory speed=2666 (G.Skill's DDR-3 rating for this memory)
- Selected Memory Profile #2 which is 11-13-13-35 (I believe there was only the #1 profile under BIOS 0601 and 0603.)
- Turned turbo off
- Set multiplier to yield 125 * 31 = 3.875 GHz
3. I ran RealBench, Prime95, and Sandra Lite for a few hours each then all at once.
4. I selected the #2 XMP memory profile, which calls out VCCSA=1.2V ( I didn't set VCCSA to 1.3, but that was its setting, so I'm guessing this was set as an undocumented magical ASUS XMP feature).
5. I reduced VCCSA fdown from 1.3V by steps of .01V until the system became unstable, stress testing with RealBench for 15 min. after each step. When it became unstable I increased it by .02 yielding a final setting VCCSA=1.18V.
6. I reduced Vcore, which was also mysteriously set higher than I expected , to a less aggressive 1.3V from 1.4V. The CPU was still running at stock, so my next step was to find the CPU clock I could get at 1.3V.
7. I ran more stress test at the stock CPU speed with memory at 2666MHz and everything was rock solid stable, so I incremented the CPU multiplier until the system was unstable (this occurred at 37x or 4.625 GHz), then I reduced the multiplier by 2 to 35x (4.375 GHz), fast enough for now.

Computer is now stable at a conservative 4.375GHz with 32 GB of 2666 memory at 11-13-13-35 (an efficiency of ~45000) and just over 60C with stress test loads. Though the first three primary memory timings can't be reduced without instability, there is probably room for improvement in the secondary settings, but it's time to use my computer instead of tuning it.

I hope this information is helpful, and that my methods were reasonable. Any tips would be welcome. 🙂

[Raja]

This is cool.

[HiVizMan]

Wish there were more folks posting this kind of information. Like the fact you did the entire process in a very systematic way.

Nice one.

[rosefire]

I'm glad you liked the post. 🙂

[rosefire]

For anyone interested in this memory here are some tightened secondary memory parameters that work on my computer:

tRTP 5
tRAS 30 (reflecting tRAS = tCL + tRDC + rRTP)
tWR 10
tRRD 6
tFAW 24 (4 x tRRD)
t_WRT 8
DRAM REFRESH Cycle 300
DRAM Refresh Interval 16383

For a refresh this long you must keep your DRAM well below its 85C rating, which is trivial with good case ventilation. ASUS quality supply regulation helps too. Long refresh times will kill your MemTweakit DRAM efficiency score in MemTweakit because ASUS has efficiency backwards for this parameter. During a DRAM refresh cycle sections of the memory are busy recharging the capacitors that store the memory values. If not refreshed often enough the stored voltages decay and a one becomes a zero. Because a section of memory being refreshed is not accessible to your CPU, refreshing less often will improve your benchmark scores. When I played with memory controllers in the lab I was shocked to find that the margins on refresh at near room temperatures are huge (some memories can retains values for minutes). Caveat: your mileage may vary.

I lowered the other memory parameters as much as I dared but did not test to failure, so there may be more room to tighten. I felt that I had reached the point of diminishing returns.

The above timings were good on my system through memtest86 and 15 concurrent HCI memtest processes (each 2GB for a total of 30 GB) left running for 8 hours. Running other stress tests concurrently caused my system to take minutes to respond to user input and event logs were filled with complaints from Windows services and Apple's Bonjour service but the 15 HCI memory test continued to update showing no memory errors.

For what it's worth -RF

Edit: I found out after this post that I could drop tRP from 13 to 12. Now running 24/7 at 4.5 GHz 2666MHz XMP at 11-13-12-29 2T with 125MHz strap. Voltages in offset mode: Vcore = +.25 VCCSA=+.175 and VDRAM 1.65V successfully on several stress tests. One of these is IntelBurnTest v2.54. where the peak core temperature registered in Core Temp 1. 0 RC6 was 74C (core #4, ambient temp. 26C). AI fans set to Turbo. Note that the Core temps average closer to 70C don't get high enough to run fans at full speed. The +2.5V offset on Vcore can probably be reduced abit. I have not tried it yet.

[Raja]

If you like HCI Memtest check out the "DOS" version. Handy tool that and a tough load to eval outright memory stability.

[rosefire]

Raja@ASUS wrote:
If you like HCI Memtest check out the "DOS" version. Handy tool that and a tough load to eval outright memory stability.

Thanks for the tip. 🙂

This was the first time I used HCI Memtest. I liked that it saturated all 6 CPUs while it was testing, though this also suggests that it may not max out the memory and IMC by pushing bandwidth utilization to the maximum. Processor bandwidth may max out before the memory achieves its maximum capabilities.

I would like to find a memory test that specifically exercises DIMM, bank, page, row and column transitions and pushes memory bandwidth as high as possible. This would really exercise the IMC and memory components. Most existing tests look for memory and memory path weaknesses/faults by exercising different data patterns, but I'm not sure they good test coverage on the timings and transitions.