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Maximus Z690 and Alder Lake: Modern CPU’s require Modern Overclocking Solutions

Level 12
Asus Z690, Maximus series and Alder Lake: The best tools for the best FPS.

First, let me start by thanking Shamino @ ROG Asus for allowing me and the other testers to put this exciting new hardware through its paces and experiment with the new overclocking features and architecture changes, and for the hard work to get these boards running well with these new features.

Also I need to thank cstkl1 and RobertoSampiao for helping me write this. Without their help, I would never have been able to do this.
And VERY BIG thank you to Skatterbencher for his excellent, precise, clear cut youtube videos on explaining these features and helping me with this guide.

Disclaimer ! These settings and methods were tested on *ENGINEERING* Qualification Sample CPU's ("QS") and
pre-production boards, so it is possible that some features may perform differently, slightly differently
identically, or even not work at all on retail CPU's. While QS samples tend to reflect final retail hardware, there may still be undocumented differences, errata, thermal issues or features that may be present or not present on retail parts.

AVX-512 support is available with Asus boards! Some of you may really love this but I am not sure if AVX512 was intended or QA'd by Intel, VRM limits may not be set for high OCP limits with AVX512. I encountered OCP with AVX512 at 5.2 ghz, so if you encounter it, you can change CPU Current Capacity in Digi+VRM.

To use AVX-512, please disable all of the E-cores. The AVX512 offsets and clipping are available just like they were and described in the Rocket Lake Z590 guide.


DDR5 operates in 2x32 bit mode rather than 1x64 bit mode. Power management (PMIC) has also been moved from the motherboard to the memory, so the memory itself manages the voltages.

The new changes to the bank structure means that two sticks of DDR5 are operating in the equivalent of "Quad channel" mode when compared to DDR4. DDR4 and DDR5 memory should no longer be compared on an apples to apples level due to the number of changes.
There are two channels per dimm and two memory controllers on the DDR5 side so the dims operate in quad channel mode for 2 sticks. CAS latency seems to have a lesser effect on latency on DDR5 than 4, for example. Max Trefi can go up to 262k, but there is no noticeable benefit from going higher than 65535, and a lot of risk of increasing stability problems with high heat. TRCD/TRP can now be set separately, focus on these for your overclocks, as well as the subs.

Yeeted tREFI may also risk an instant BSOD when you stop a stress test when the memory heats up or when you use sleep mode.
PMIC defaults to 1.10v for VDD and VDDQ. Some memory modules may want up to 50m-100mv higher VDDQ than VDD when overclocking. A "high voltage" mode allows higher than 1.43v, however this is an actual register toggle within the memory itself. Some modules are not compatible with this register, so enabling it will just reset the voltage back to default, or prevent booting at all. More accurately it uses a target voltage based on 10mv resolution calculation rather than 5mv, which means the real voltage will be much lower than what you think you set, if you are using incompatible sticks.

PMIC voltages's are usually synched together per channel but can be set separately both per channel AND per Dimm. There are three switching rails, VDD, VDDQ and VPP. VCCSA (System Agent) is still there. I have been unable to test changing this as my Micron sticks do not go much higher than 5200 XMP (5600 did work with a lot of difficulty).

Power rails have been simplified on the motherboard. There are two master rails, VCCIA and VCCAUX (sorry I don’t remember the exact names). IA rail controls Vcore and vGPU. AUX rail controls everything else (SA, FIVR, etc).
PMIC is on the memory which controls the voltage the memory actually runs at (VDDQ, VDD etc).
This is sourced from the motherboard’s 5V supply. As mentioned above, some modules have a high voltage bit which can allow more than 1.435v.

Secure Pmic mode: cannot be adjusted in windows. Allows up to 1.435v. Compatible with all 5mv resolution
OC Pmic: can be adjusted in windows. Can set yeet volts up to 2.070v. 10mv resolution


Some values available in BIOS and should you care:

SPD Hub VLDO (1.8v): Don’t bother
SPD Hub (VDDIO) (1.0v): Don’t bother
Memory VDD voltage (definitely use it. 1.25v+ is good for OC)
Memory VDDQ voltage (1.2.5v+ is good for OC)
Memory VDDP voltage: Don’t bother.
Memory switching freq: not much help.
Memory current capacity: not really needed
System Agent: 1.25v+ (ask cstkl1 about this, there seem to be some issues with high system agent and some memory settings
Memory controller voltage (external): 1.25v+ for OC
Transmitter VDDQ (max to any high limit VDD, VDDQ).

So tl;dr: concern yourself with vdd, vddq, VCCSA, MC VDD, TX VDDQ.

ROG Shamino’s rule of memory voltages:

Typically the higher the density, the lower the V tolerance, eg, V for 4*DR< V for 2*DR
Micron sticks:
SR modules typically can scale with VDDQ>1.35v while VDD may fail training >1.35v. So you may end up running something like 1.35v VDD + 1.435v VDDQ. SR module also like VDDQ to be ~ 50++mv-100mv higher than VDD so try to OV them asynch.

DR modules may have less V tolerance, so something like 1.25v VDD + 1.35v VDDQ will be what you end up maxing out at.
Some micron sticks may end up MORE stable fully loaded than idle. Be careful about idle BSOD’s. This may get worse if you start yeeting tREFI and end up BSOD’ing at the very end of a stress test.

1T Command rate will NOT work.

Hynix sticks:
SR modules typically can scale with VDD>1.3v while VDDQ may not need much over 1.25v. So you may end up running something like 1.35v VDDQ + 1.25v VDDQ. (inverse from what you see on micron) Similar for DR modules.
1.25v MC VDD works well for them. 1T command rate works with these.

Samsung Sticks:
Yes. Don’t need to say more.
Some modules do not like >1.25v Memory controller VDD, while some need it to scale for high frequencies.
You also need to scale the TX VDDQ according to VDD/VDDQ levels. A rule of thumb is to set it to the highest of either your VDD or VDDQ but try to not exceed 1.6v. Sometimes the FIVR rail will trip on you if you do.

Shamino’s rule:

For starters, you can just run 1.25v on both VDD and VDDQ for Hynix, 1.25VDD+1.35VDDQ for Micron, and 1.35VDD+1.35VDDQ for Samsung and let the BIOS decide on the rest for you by leaving them auto. You may also want to start with Asus Memory Presets.

Another strategy worth trying is:
Synch DRAM VDD with MC VDD, Synch TX VDDQ with DRAM VDDQ.
Default Gear mode for DDR5 is Gear 2 (Gear 1 will not work), with POR for 1 dimm per controller being 4800 mhz and 2 dimms per controller being 4000 mhz. The default base to clock ratio for DDR5 is 100:100, and unlike Rocket Lake, the 100:100 and 100:133 ratios seem to perform pretty well.

For the three gear modes (1/2/4), gear 2 requires that the dram ratio be divisible by 2, while gear 4 requires a divider of 4. So 4800 at 100:100 is fine. But 4900 is *NOT* since it’s not dividable by 2 or 4.
Gear 4 may only be worth using at 8000 mhz +.
DRAM Timings:

Use even numbers for TCL and TWCL, odd numbers don’t work.
TRP and TRCD can be individually adjusted. For questions about memory OC please ask cstkl1. I can’t help with memory OC.

Rough Description at Gear2:
Fmax VDD VDDQ TXVDDQ MC VDD SA Able to run CMD Rate 1T
2* Hynix SR 5800 1.3 1.25 1.25 1.25 1.25 yes
4* Hynix SR 5200 1.2 1.2 1.2 1.2 1.25 no
2* Hynix DR 5400 1.3 1.25 1.25 1.25 1.25 no
4* Hynix SR 4200 1.2 1.2 1.2 1.2 1.35 no
2* Micron SR 5600 1.35 1.4 1.4 1.34 1.2 no
4* Micron SR 5200 1.25 1.25 1.25 1.25 1.25 no
2* Micron DR 5400 1.25 1.25 1.25 1.25 1.2 no
4* Micron DR 4200 1.2 1.2 1.2 1.2 1.35 no
2* Samsung SR 5800 1.435 1.435 1.435 1.34 1.25 yes
4* Samsung SR 5200 1.35 1.35 1.35 1.25 1.25 no

You can definitely get 6000 and beyond, depending on lottery+ running with Hynix or Samsung but mem test stability depends on the IC quality. Watch your memory cooling at higher volts!

Next section: CPU Core OC
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Level 7
In PMIC Voltages, when set to 'by per PMIC'... It then seperates into PMIC0, PMIC1, PMIC2 & PMIC3 - all have their own VDD & VDDQ voltages. I think you can set each slot a different voltage.

How do those PMIC's translate to A1 B1 & A2 B2?
MB: Asus Z690 Maximus hero
RAM: 2x32gb g.skill Trident Z 5600mhz ddr5
NVME: 2x Samsung nmve 1tb 980 pro
HYPERCARD: 2x Crucial P3 4TB nvme
CPU: i9-13900k
GPU: Gigabyte 3080 Ti Eagle OC
COOLER: Gigabyte waterforce 360
CASE: CM TD500 mesh
PSU: Corsair HX1000

Hopefully we can get AI OC to work on Z790 HERO properly in next update 😞