Thank you to Shamino and the Asus ROG team for allowing me to test their engineering sample Z790 Extreme and 13900KF QS CPU.
DISCLAIMER: QS CPUâ€™s may be final silicon but there can still be changes going from QS to retail.
QS is not always indicative of retail chips, so results on retail may be better or worse than Qualification Sample chips.
Asus really did it this time. I hadnâ€™t been as impressed with a launch since Asus upped their game with Alder Lake, but they not only proceeded to right the ship after navigating a few storms, they turned on the afterburners with Raptor powered enginesâ€¦ letâ€™s get right down to it before I start rambling like Buildzoid.
First, Asus made a huge change with Z790.
1. Better Apex. Much better Apex. Expect DDR5 A-die to reach the gearing 2 limits of DDR5 this generation. And 4 dimm boards can expect at least DDR5-8000 clocks with two dims with A-die. Expect improvements and Extreme and Hero also, and QVL up to 7800 mhz DDR5
2. PCIE Latch slot is improved. Seems to be more solid and responsive than the Z690 version.
3. Ok I saved the best for last. IMPROVED RELIABILITY. The big change now is that the dual bios switcher button is now linked directly to safe mode. You can thank Robertosampiao and Shamino for this. Now when you switch BIOSes, the board posts in safe mode on the first boot. This allows you to check your OC settings, flash a BIOS safely and â€“the most important changeâ€”this safe mode allows different EC/LED/Aura firmwares linked to a different BIOS version to update automatically with safe clocks before you enter the BIOS!
Now you will never have to worry about a 6.2 ghz Jufes Stable â„¢ single core overclock crashing a firmware update and bricking a board (sorry, framechasers is not someone you want to watch to learn how to overclockâ€”watch Skatterbencherâ€™s videos). This was important with all the work that RobertoSampiao did with single core and by core usage overclocking. I just study chess and use Stockfish for my stress testing so I deal with max thread usage and all cores, make sure you consult RobertoSampiaoâ€™s guides for help with by core usage and specific core overclocking.
Overall, virtually everything posted in the previous guides for Z690 remains true here. You can refer to Skatterbencherâ€™s Z690 Videos (like/subscribe), and RobertoSampiaoâ€™s specific core overclocking guides here, and my previous write-down here.https://www.overclock.net/threads/asus-maximus-z690-extreme-i9-12900k-guide-load-lines-vf-curves-ada...https://rog.asus.com/forum/showthread.php?126369-Maximus-Z690-and-Alder-Lake-Modern-CPU%92s-require-...
Shamino also covered all of the basics without getting all wordy like me here:
ROG Z690 Overclocking Guidehttps://rog.asus.com/forum/showthread.php?126439-ROG-Z690-Overclocking-Guide
SP range is from total SP: 80 to 120.
75% of the chips will tend to be SP 100 or lower.
A recent sample in China was binned from 10 retail 13900KF chips, two were SP109 and SP105, four others were SP95, 96, 94 and 97. Itâ€™s unclear (I donâ€™t read Chinese) if one was SP100 or not. Retail bins coming from others are showing similar results.
The highest legitimate individual P-core SP Iâ€™ve seen is SP132. This chip only had a total SP of 114 because the E-core SP was 80.
Someone on OCN posted a picture of an SP 138 P core. Whether this is a bug or not remains to be seen.
Sugiâ€™s QS chip is the same total SP (114) but his P core SP is 124 and E core SP is 94. A very powerful daily chip for delidding and water cooling, as the E core SP is extremely high.
Another HWbot LN2 tester QS sample had 119/84. Mine is 113/94. RobertoSampiao has P core 119 but is having temp issues possibly due to an unsupported backplate.
Iâ€™d say you can expect 5.6 ghz R23 stable on even the worst samples and 5.7 ghz R23 stable on above average samples.
On AIOâ€™s, only golden chips will do 5.8 ghz R23 stable when not delidded, on any sort of reasonable voltage (letâ€™s say 1.25v die sense load voltage).
If you delid these chips, expect them to scale massively.
The only real new OC features added to Z790 are two things: the Dynamic Cache OC Switcher feature, which allows the cache to switch from a high to a low clock state depending on usage, and some new OCTVB changes.
You can specify the high and low cache ratio and voltage (Cache SVID) to be used for each step. This is somewhat similar to the Voltage Suspension feature.
You can specify how many threads you want to sleep for high cache gear, as well as the amount of current pulled to switch from high cache to low cache speeds.
The OS will sleep threads based on usage, lowest priority first.
This order is based on IPC:
1: Hyperthreaded (Logical) cores.
2: E cores
3: P cores.
So if hyperthreading is disabled, you obviously start with specifying # of E cores.
If HT is enabled, you specify the # of P cores (for the HT threads) + the # of E cores.
Ring Ratio desired for high gear:
Ring adaptive voltage for high gear > â€œ0â€� means use the default ring VID.
Ring Ratio Desired for low gear:
Ring adaptive voltage for low gear > â€œ0â€� means use the default ring VID.
RobertoSampiao will have more information about this. As these options are not useful for Chess engines which need as many cores and threads as they can get.
The second option was an option suggested by RobertoSampiao back on Z690: Global OCTVB temp offset, which allows an offset on all cores rather than having to enter the offset on each core.
A related option regarding OCTVB added to Z790 new is the "boost until target" option
When you select this u set a multiplier, e.g. 60x, and the OCTVB will try to boost the best cores to that target. The other cores will go up to 2x to try to hit this target.
II: Overclocking Frequency Changes.
Due to changes in the cache and latency and E core bus systems, you can expect much higher clocks than what was achievable on a 12900KS.
5.6 ghz P cores can be expected if you can cool it.
With E cores disabled, Ring can reach 5.1 ghz.
With E cores enabled, 4.9 ghz ring is possible with enough voltage.
E cores can go up to x47 but this requires a lot of core voltage.
Single core fmax is 6-6.2 ghz.
WHEA ERRORS ARE BACK.
Skylake decided to get its revenge.
Now, CPUâ€™s overheating or overclocked at marginal voltages can expect:
CPU Cache L0 errors
Internal Parity Errors
CPU Translation Lookaside Buffer Errors
PCIE Bus Errors. (very often the PCIE Bus errors will come first in line).
Clock Watchdog Timeout BSODâ€™s
System Service Exception BSODâ€™s (usually triggered by I/O access when youâ€™re at marginal vcore while trying to run AVX prime95).
Unlike Skylake, you will no longer have CPU Cache L0 errors or Internal Parity Errors trying to run Minecraft. If you get L0 or parity errors, your overclock just isnâ€™t stable.
Core PLL Trim between 0.975v-1.02v can give you a very slight margin of stability (10-15mv)
Tidbit: An old trick available is to use ucode switcher in tweakerâ€™s paradise to load an older "04" microcode, which can lower temps by 8C.
Someone will have to take a thermocouple into the CPU socket to verify as sub ambient temps have been reported with old ucode.
Performance seems to to be better with current microcode and PLL trim functions as expected.
Note: Please do NOT use Core PLL Trim with old ucode switcher.