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Strix X870E-E Gaming Wifi M.2 gen 5 and PCIe lane sharing

BJBBJB
Level 10

All of my builds use ROG components and I have read the manual, but still unclear on this.

I have 2 Gen 5  M.2 SSD drives.   I am very familiar with lane sharing over the years.  

The manual says: M.2_2 & M.2_3 slots share bandwidth with PCIEX16(G5).  When M.2_2 & M.2_3 are occupied with SSD devices, PCIEX16(g5) will run X8 only. It is unclear to me if this means both or either?

The question is, if I only occupy ONE of those slots with a Gen 5 (say M.2_2) and put a Gen 5 in M.2_1 (should be no issue and no impact on this), does that config cut the video card speed to X8?

Or does putting a Gen5 drive in EITHER M.2_2 & M.2_3 trigger the speed reduction?

If so, I will put my boot Gen 5 in M.2_1 and my other Gen 5 in M.2_4 and it will run at Gen4 speed which I can live with. If someone can point me to a definitive explanation I would appreciate it. I know the table for my manual is has less parameters listed than the X870E Hero manual which is was discussed a lot. 

I also am trying to decode the detailed manual as to whether I need to use the rubber pads for a Crucial T705 M.2 4TB and a Tforce GC PRO Gen5 4TB.  I underside it is all about single side or double side but I cannot find that in the specs. to determine if they are. 

Thanks!

BJBBJB

 

 

 

 

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13 REPLIES 13

Tom017931
Level 9

I would also like to know. 

I have a gen5 in m.2_3 and a gen4 in m.2_1.

Does that configuration cut my pcie to 8x if so what is the best configuration to use not to cut it to 8x.

Thanks in advance 

Yes, it cuts pcie to 8x. Use gen5 on m.2_1

Breakerzeus
Level 8

Even if only ONE of these slots are occupied, the lanes would be shared. tested this by myself by accident. So the best setup would be to put your SSD into the m.2_1 (the right one directly below the RAM) since it's directly connected to the CPU and leave the others empty. Additional SSDs could be connected via chipset (slots below the graphics card). At least that's what I went for.

Thank you!  Especially nice that you tested it, even if by accident!  That is exactly what I will do for this 100% gaming build.   Gen 5 in m.2_1 and then the second SSD in m.2_4 (which will run in Gen 4 whether it is a Gen 4 or Gen 5 drive).  

I am contemplating another mixed creative/gaming build that will use 4 SSD's.  I may have to consider a different Asus ROG motherboard for that build. I don't need them all to be Gen 5, although I would prefer that at least 2 of the 4 were.  Currently leaning toward an AMD build but I am a few months out.  

Thanks again for the reply.  

BJBBJB

 

Sure you can do that, with that many SSDs. But beware: the lane sharing still happens even when using gen4 SSDs. I only have Gen4 and they're still sharing lanes with pcie. So please keep that in mind.

Hmmm...that is why I think I may need to look at other motherboardsfor my other build.  You guys know more than me about the other Asus boards, is there an Asus ROG AMD or Intel board where I wouldn't have that issue?  

jrich523
Level 8

what would the impact be if you put the GPU in the G4 slot (chipset pci 4.0 x16) and used the m2_1, m2_2, m2_3 slots for pci 5.0 nvme's? 

the gpu is only 4.0 anyways and this way you'd get full x16 on the gpu and be able to fully utilize the nvme's. or am i missing something about how the chipset pci slots would work?

Breakerzeus
Level 8

Well, that's the thing: how much lanes you have is determined by the CPU architecture, so no board manufacturer can do something about this.  AMD only set enough lanes to provide one SSD to be able to connect directy with the CPU and still have the full x16 of PCIe. And it does not matter if it's Gen4 or Gen5 since the lanes are used. It's not like we have 24 Gen5 Lanes AND X amount of Gen4 Lanes.

AMD did reseve a few lanes for USB4.0, so we can't really do much about it. And as I said: I only have Gen4 SSDs and an RTX 4090 (also G4). It's still shraing lanes all over, regardless if it's Gen4 or Gen5. Lanes will be used. It's simply that AMD decided that they all can handle Gen5 unlike Intel where they have a few lanes that can only handle Gen4.

EDIT: for better understanding, I just found the scheme picture that helped me a lot to understand the issue: https://www.pcgameshardware.de/Mainboard-Hardware-154107/Specials/X870-X870E-im-Detail-1456565/galer...

Moriendor
Level 8

Exactly. It's a CPU issue as far as the Gen 5 lanes are concerned. I always have to install three M.2 SSDs and with the ASUS ROG STRIX X870E-E, I went for M2_1 (CPU), M2_4 (X870) and M2_5 (X870).

As a gamer, M2_2 and M2_3 are basically non-existent. I do not want to cut my graphics card bandwidth in half (even if this has little relevance in practice and you only lose very low single digits of performance in most scenarios).

I also think this is less than ideal because the M2_1 slot is in a hot spot between the CPU/RAM and the GPU. At least it is slightly recessed towards the back on the STRIX 870E-E and you can install a 60mm fan (see the manual for details... it has to be a 60/10 fan) to the M2 heatsink.

I only use a Gen 4 SSD in M2_1 and I have Samsung 990 Pros in the M2_1 as well as in the M2_4 slot. As I am typing this post, the 990 Pro in M2_1 is at 43°C while the 990 Pro in M2_4 is at only 32°C (and my Kingston Gen 4 SSD in M2_5 sits at a chill 25°C).

This temperature difference becomes even more pronounced when gaming, of course. It is a pity that you can really only use M2_1 for the CPU-connected SSD but that's how it is on pretty much all AM5/Zen5/X870 boards because AMD has made the unfortunate decision to take away four CPU lanes for USB 4.0.

Zen 5 has 28 CPU lanes. 16 to PCIe (GPU), 4 lanes to chipset (X870), 4 lanes M.2 and 4 lanes USB 4.0. That's just how it is. As soon as you want more M.2s from the CPU then you need to take away from the 16 PCIe lanes, i.e. lane sharing.

Where the boards are more flexible is only the X870(-E) chipset lanes. Some boards may have more M.2 slots, some boards more USB, some boards dual LAN, some boards more PCIe slot lanes etc. etc. etc. but the limitations of the CPU lanes are set in stone by AMD.