ill use this thread to collect some new test bioses for the boards, maybe also to explain some less understood options
to disable cores ccd go here and choose ccd xx bit map down core.
each ones stand for an enabled core
best to disable from the back, ie:
110000
instead of 0011000
after selection press downcore apply changes or discard if made mistake
ocpak/octools
FAQ:
7950x not boosting pass 5.5G -> check that CStates is not disabled
Detailed Explanation on CState Boot Limiter
Test BIOSes:
Spoiler
new:
X3D OC Preset for those MB with asynch BCLK Support: (for simple slight perf boost for X3D)
DOCP/EXPO Tweaked: (for simple timings tightening)
strixe-e 1515
for crosshair and strix e-e:
explanation of segment2 Loadline:
customize a heterogenous loadline for a dual segment workload range.
example above shows loadline=L6 when current is in range of 0~40A, and Level4 when current is above 40A.
Adds for x3d
dynamic ccd priority switch with core flex, os / driver agnostic so win10 win11 ok
Algo as follows:
If condition reached and ccd0 specified, then check current mem/cache activity > threshold and hysteresis reached, if fulfilled then switch
If condition reached and ccd1 specified, then check current mem/cache activity <=threshold and hysteresis reached,, if fulfilled then switch
Default hysteresis =4
Can combine multiple algos for ccd priority so combinations are wide
works on non x3d too but of course senseless on it. detailed explanation here.
It does not really work like that.
In picture below you see 2x 990Pro SSD.
The one in the top is 7400MB/s
The other is 6500MB/s as its bandwith is shared with other components on the chipset.
Think its the PCIe on the Gen2 adapter wich connects to the Chipset
