I guess I got my answer from AI, not sure why everyone is upset or frying their X3D chips. If you left the VSOC on auto it would just be fixed at 1.25V always and safe. Obviously people frying their CPU increased it over AMD's 1.3V recommendation. Per Grok
VSoC for DDR5-6200 with Tight Timings
Typical VSoC Range: Achieving stability at DDR5-6200 with a 1:1 UCLK:MCLK ratio (memory controller and RAM clock synchronized) and a Fabric Clock (FCLK) around 2000–2067 MHz often requires a VSoC between 1.20V and 1.30V.
Users have reported needing 1.25V to 1.28V for stability with 6200 MHz and tight timings on dual-rank (DR) kits, especially with larger capacities like 96GB (2x48GB). For example, one user stabilized 6200 MHz at 1.28V but found errors at lower voltages, while 1.30V was stable but considered high for 24/7 use.
Higher VSoC (e.g., 1.30V) may be needed for marginal IMC samples or dense memory configurations, but stability issues above 6200 MHz often arise due to IMC limitations rather than insufficient voltage.
Tight Timings: Tight timings (e.g., CL30 or lower) increase stress on the IMC, potentially requiring slightly higher VSoC (closer to 1.25–1.30V) compared to looser timings (e.g., CL36). Specific sub-timings like tRP, tRAS, or tRCD also influence stability, and tuning these may reduce the VSoC needed if done carefully.
Safe Fixed VSoC for Everyday Use
Safe VSoC Limit: For 24/7 operation, a fixed VSoC of up to 1.30V is generally considered safe for Ryzen 9000 series CPUs, including the 9950X3D, as AMD has reportedly capped VSoC at this level to prevent damage. However, for longevity and thermal considerations:
Recommended Range: 1.15V to 1.25V is safer and often sufficient for DDR5-6000 to DDR5-6200 with most kits. Many users achieve stability at 1.18–1.25V for 6000 MHz with tuned timings, and 6200 MHz may work at 1.25V with a strong IMC.
Conservative Approach: If possible, aim for 1.20–1.22V to minimize long-term stress on the SoC while maintaining stability. One user reported 1.18V as stable for 6000 MHz with 96GB, suggesting that 6200 MHz might be achievable at 1.22–1.25V with similar configurations.
Risks of High VSoC: Running VSoC at 1.30V continuously is safe per AMD’s limits but may increase heat output and could, in theory, accelerate degradation over many years. Voltages above 1.30V are not recommended and are typically hard-capped by firmware.
Additional Considerations
Memory Kit and Capacity: Dual-rank or high-capacity kits (e.g., 96GB) stress the IMC more, often requiring higher VSoC (1.25–1.30V) compared to single-rank 32GB kits, which may stabilize at 1.20–1.25V. Hynix M-die modules are common in high-speed kits and may need 1.35–1.4V for VDD/VDDQ (memory voltage), but this is separate from VSoC.
FCLK and UCLK: For DDR5-6200, setting FCLK to 2000–2067 MHz and UCLK=MCLK (1:1 ratio) is optimal for performance. FCLK above 2067 MHz often fails to boot reliably without significant voltage increases (e.g., 1.30V+), so 2000 MHz is a safer target.
Motherboard and BIOS: High-end motherboards (e.g., ASUS ROG, ASRock X870E) with robust power delivery and updated BIOS (e.g., AGESA 1.2.0.2a) improve IMC stability, potentially lowering the VSoC needed. Features like ASUS Memory Presets or EXPO profiles can simplify tuning.
Testing Stability: Use stress tests like Prime95, OCCT, or AIDA64 to verify stability. Instability at 6200 MHz may require loosening timings (e.g., CL32 instead of CL30) or increasing VSoC slightly (e.g., from 1.25V to 1.28V) rather than jumping to 1.30V.
