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X670 resource

Shamino
Moderator

ill use this thread to collect some new test bioses for the boards, maybe also to explain some less understood options

to disable cores ccd go here and choose ccd xx bit map down core.
each ones stand for an enabled core
best to disable from the back, ie:
110000
instead of 0011000
after selection press downcore apply changes or discard if made mistake

ocpak/octools

FAQ:
7950x not boosting pass 5.5G -> check that CStates is not disabled
Detailed Explanation on CState Boot Limiter


Test BIOSes:

new:
X3D OC Preset for those MB with asynch BCLK Support: (for simple slight perf boost for X3D)
97792

DOCP/EXPO Tweaked: (for simple timings tightening)
97793

strixe-e 1515 

strixe-f 1515 

strix e a 1515 

crosshair hero 1515 

crosshair gene 1515 

crosshair extreme 1515 

creator 670 1515

creator b650 1515

strix 650E I

strix 670 itx

 

 

for crosshair and strix e-e:

explanation of segment2 Loadline:

dualseg.jpg

customize a heterogenous loadline for a dual segment workload range.

example above shows loadline=L6 when current is in range of 0~40A, and Level4 when current is above 40A.

 

 

 


Adds for x3d

dynamic ccd priority switch with core flex, os / driver agnostic so win10 win11 ok

97403

97404

Algo as follows:
If condition reached and ccd0 specified, then check current mem/cache activity > threshold and hysteresis reached, if fulfilled then switch
If condition reached and ccd1 specified, then check current mem/cache activity <=threshold and hysteresis reached,, if fulfilled then switch
Default hysteresis =4

Can combine multiple algos for ccd priority so combinations are wide

works on non x3d too but of course senseless on it. detailed explanation here.

922 Views
2,066 REPLIES 2,066

Answering to my best knowledge...

EXPO Tweaked raises the tREFI and that's good for performance?

As of my knowledge tREFI is the interval between refreshes. The D in DRAM stands for "dynamic". Information is stored as charges within the cells. Those charges are lost due to multiple reasons like transistor leakage current. When the charge is lost the information in the cell is gone. This is why DRAM is losing its content when not powered.

To avoid losing the information the cells need to be "refreshed" (read: re-charged). The interval at which this needs to happen depends on the memory cells and how fast they lose charge.

Note that during refresh cycle (this is another timing parameter) the memory essentially becoming unavailable as the cells need to be refreshed. So for the duration of the refresh you just need to wait. So it is desirable to stretch the interval (time between refreshes) out as much as possible but not too long as your cells might lose information before you initiate the next refresh. In addition you want to keep the refresh duration itself as short as possible (essentially the time the controller will hold-on accessing the memory as it is refreshing). You might want to read this. Look for tRFC (refresh cycle duration) for the duration of a cycle and how long the controller waits before accessing the memory again after having initialized a refresh. So you want to keep this low - but remember if you get too low your memory might still be refreshing while your controller will try to access it -> fail.

Also don't expect huge improvements by tweaking any of those timings. Caches will often neglect the impact of slow memory timings as well as the impact is not as huge as one might think. For DDR-6000 (3000MHz) one clock cycle is 0.333_ns (nanoseconds). So this is why your ZenTimings screenshot also shows a time of 0.000000000333333 * 65535 = 21.845uS (micro-seconds) for the refresh interval.

So assuming you do a refresh cycle every 65535 clocks and have to wait for of 884 (see tRFC) * 0.333ns = 295ns your RAM is essentially busy for refreshing for about 1.3% of its time. Changing the refresh interval (tREFI) of 11677 with the same 884 tRFC would keep the memory busy at 7% of its time. However this is quite an extreme example and I also don't know why ASUS has choes in your case in EXPO I profile to chose such a short refresh cycle. I guess most memory modules would be just fine with higher values and EXPO II (values set by G.Skill) seem to confirm this for your module. But Just saying that going from tREFI of 50000 (1.7% busy) to tREFI of 65535 (1.3% busy) will likely not make any difference in benchmarks. Also don't over-estimate those figures impact to the overall system performance.

 


EXPO Tweaked has the same timings as EXPO I, but it's still better performance than EXPO II?

As I remember your post the settings don't differ much except mainly tREFI and you got same tREFI on EXYPO II and Expo Tweaked. Only EXPO I (tweaked by ASUS) seems to use lower tREFI and honestly I don't know why they should do this. Your memory module EXPO profile seems to say 65535 (the longes possible interval) is just fine with the module and the memory as witnessed by EXPO profile cells hold charge between those intervals. So there would actually be no reason to lower this at all. Not sure why ASUS in their "optimized" settings (EXPO I) would lower it - remember the above explanation that in this parameter higher values are better than lower ones.

So unless EXPO Tweaked is also adjusting other parameters other than memory primary and secondary timings you would not really see a difference between EXPO II and EXPO Tweaked in your case - and might experience just very slightly lower memory performance in EXPO I for some obscure decision-reasons on tREFI.

Again: Remember that this is potentially measurable in dedicated memory benchmarks but do NOT expect this to even have a measurable impact on any application or game performance. Specifically for games it's more desirable to work with data in CACHES and not in MEMORY as memory is anyway several orders of magnitude slower than caches or registers. Memory performance simply does not matter in scenarios which do not access memory. This is why the X3D models shine in so many gaming use-cases. They prevent more accesses to slow memory.

 


EXPO Tweaked+Nitro is even better, potential, performance than EXPO Tweaked, but same timings as EXPO I?

No. You wouldn't expect more performance by enabling NITRO. This is a common misunderstanding. NITRO might help you getting some extreme borderline-unstable configurations more stable. But you wouldn't want to run any productive system near this point of instability. It's perhaps good for benchmarks only but not for productive use. So simply said if your system tends to get shaky on some configuration you might in some rare cases get slightly better stability by enabling NITRO. But if you are at this point you are potentially anyway going to accept the system to become unstable under some load situations or even EMI radiation or even the phases of the moon might have bigger impact.

To say it clearly: Do not expect a performance boost from using NITRO unless you are going to be able to tweak your settings (increase operating frequencies) higher and NITRO is the setting allowing you to do this. In almost all cases you will find that your system is stable at frequency X and crashing at frequency X+1 and NITRO might just help you to get it booted at X+1 too at a performance gain of 0.0...1% with the risk of crashing anytime anyway.

Remember that overclocking nowadays is not really overclocking any more. It's just the use of safety margins manufacturers built-in to their products to provide stable pre-settings. You just want to get closer to the point of instability than the manufacturer dared. Risking instabilities at any time and accepting it.


The electrical signaling seems also unchanged if it's proc, rtt etc.?


Signalling itself is the same (standards) but that's only half of the truth. No signal is perfect and NITRO and other tunings are compensating for some insufficiencies and noise-levels etc. Things are very complex on signal transfer and signal integrity level. However those things are not exposed to be tweaked on BIOS level and the hardware is expected to negotiate those electrical parameters. This is what training does in a nutshell.

 

EDIT: Forgot one thing to mention. As everybody is looking for the last bit of performance you should perhaps check your UCLK settings.As of your screenshot you seem to run in 1:2 mode (UCLK=MEMCLK/2). Check advanced DRAM timings page at the bottom and change "UCLK DIV1 MODE" to "CLK=MEMCLK". I guess this would give you more performance boost than all timing optimizations all-together. Assuming you can get it stable at CLK=MEMCLK=3000MHz.

@SkyBeam , again: AWESOME explanation! I think, at least, I understand a little bit more! Although tREFI is the same value at EXPO I and II: 11677 vs EXPO Tweaked: 65535. But EXPO II has lower tRC than any of the other profiles by 10 cycles.

From what I understand now I should choose EXPO Tweaked with the 10 cycle higher tRC, but vastly higher refresh time.

I'll check the UCLK DIV1 MODE setting!

Thank you again!

EDIT: UCLK=MEMCLK works great! Thank you for the tip!


@Falck wrote

From what I understand now I should choose EXPO Tweaked with the 10 cycle higher tRC, but vastly higher refresh time.


You can also just use EXPO I or II and simply punch in MAXINT value of 65535 for tREFI in one of those profiles, overwriting the default value for those profiles. Since your modules very likely work just fine with those long refresh intervals feel free to use it on any profile.

The complete refresh process is executed through a series of smaller operations, intentionally staggering the refresh cycles to avoid simultaneous refresh of all cells. This strategy is employed due to the varying leakage rates exhibited by each individual cell. For this reason, it can sometimes be difficult to establish unconditional stability when applying a high tREFI value. Often I'd recommend leaving auto values as the performance trade-off is not worth the headache of undetectable errors. Sending the system into S3 Resume for long periods of time can be a good way to catch unstable tREFI values as the cells will diminish over time and the system will often fail to resume successfully. Ultimately, tweaking is all part of the allure but outside of benchmarking, there is very little to be gained here.

13900KS / 8000 CAS36 / ROG APEX Z790 / ROG TUF RTX 4090


@Silent_Scone wrote:

The complete refresh process is executed through a series of smaller operations, intentionally staggering the refresh cycles to avoid simultaneous refresh of all cells.


Thanks for adding the correction. Great to see some experts are going to read the discussions here too.

lordofwater
Level 9

the new build is coming home and will be 7950x3d an itx board (but i don't know wich probably the x670e-i) 64gb (2x32) of ram xpg lancer, 2 nvme 1tb and 2tb sk hynix platinum p41 and a fractal torrent compact/nano white or terra color jade wood will be beautyfull!!! 

Highly recommend the Torrent nano. Also, you may want to compare features between the x670e-i and the b650e-i. IMO there's no benefit to the x670 on an itx board. There's no room for the extra ports that x670 provides, so may as well save a few bucks 🙂

yeah thanxs but i want to use my custom loop ek with x670e-i and the monoblock ek/noctua for the x670e itx the alternative is the gene and 1 matx case or 1 jonsbo or jonsplus case or probably i take this 2000D Airflow with Power Supply, AIO Cooler, and Fans Bundle Deal!!!!

lordofwater
Level 9

ok i go with the x670e-i and ek momentum so i can use my kit ek with soft tube for my build and for the case you have anyhint?

My new case probably is lian li air mini/q58/dynamic mini or fractal torrent nano or jonsplus i100 pro or ssupd what do you think?

jtdij
Level 8

Do you know where I should submit feature requests? Would love if someone could add an x8x4x4 bifurcation option to the top PCIe slot on the X670E ProArt. My HBAs don't get detected if I try to bifurcate top slot x8 and second slot x4x4, and running the top slot in x4x4x4x4 mode limits my GPU to just four lanes.