10-13-2023 09:32 AM - edited 10-18-2023 05:23 PM
After updating the BIOS to AGESA 1.0.8.0, I did not get stability in my memories at 6400MHz or 6200MHz. After many tests I managed to manually stabilize it at 6000MHz, as shown in the photo. Unable to activate XMP profile with stability. I noticed that the electrical voltages for the Memory Controller are quite exaggerated as the DDR5 voltage rises to the point that the machine shuts down during stability tests, I had to manually intervene with this too.
DDR5 6400 @6000MHz
I don't have a solution to the problem until a new AGESA is released, the posts below are not the solution to the problem, unfortunately.
HWiNFO64 Version 7.50-5150
RYZEN_9_7950X -------------------------------------------------------------
Memory --------------------------------------------------------------------
[General Information] DDR5 GeiL CL32-39-39-96 D5-6400
[Current Performance Settings]
Maximum Supported Memory Clock: 2800.0 MHz
Current Memory Clock: 2994.6 MHz
Current Timing (tCAS-tRCD-tRP-tRAS): 30-36-36-90
Memory Channels Supported: 2
Memory Channels Active: 2
Command Rate (CR): 1T
Read to Read Delay (tRDRD_SC) Same Chipselect: 1T
Read to Read Delay (tRDRD_SG/TrdrdScL) Same Bank Group: 8T
Read to Read Delay (tRDRD_DG/TrdrdScDlr) Different Bank Group: 9T
Read to Read Delay (tRDRD_DD) Different DIMM: 9T
Write to Write Delay (tWRWR_SC) Same Chipselect: 1T
Write to Write Delay (tWRWR_SG/TwrwrScL) Same Bank Group: 23T
Write to Write Delay (tWRWR_DG/TwrwrScDlr) Different Bank Group: 10T
Write to Write Delay (tWRWR_DD) Different DIMM: 10T
Read to Write Delay (tRDWR_SC) Same Chipselect: 24T
Read to Write Delay (tRDWR_SG/TrdwrScL) Same Bank Group: 24T
Read to Write Delay (tRDWR_DG/TrdwrScDlr) Different Bank Group: 24T
Read to Write Delay (tRDWR_SD) Same DIMM: 24T
Read to Write Delay (tRDWR_DD) Different DIMM: 24T
Write to Read Delay (tWRRD_SC) Same Chipselect: 8T
Write to Read Delay (tWRRD_SG/TwrrdScL) Same Bank Group: 8T
Write to Read Delay (tWRRD_SD) Same DIMM: 8T
Write to Read Delay (tWRRD_DD) Different DIMM: 8T
Read to Precharge Delay (tRTP): 23T
Write to Precharge Delay (tWTP): 101T
Write Recovery Time (tWR): 90T
RAS# to RAS# Delay (tRRD_L): 15T
RAS# to RAS# Delay (tRRD_S): 8T
Row Cycle Time (tRC): 126T
Refresh Cycle Time (tRFC): 884T
Four Activate Window (tFAW): 32T
Row: 1 [P0 CHANNEL A/DIMM 1] - 32 GB PC5-51200 DDR5 SDRAM GeIL CL32-39-39 D5-6400
[General Module Information]
Module Number: 1
Module Size: 32 GBytes
Memory Type: DDR5 SDRAM
Module Type: Unbuffered DIMM (UDIMM)
Memory Speed: 3200.0 MHz (DDR5-6400 / PC5-51200)
Module Manufacturer: GeIL
Module Part Number: CL32-39-39 D5-6400
Module Revision: 0.0
Module Serial Number: N/A
Module Manufacturing Date: Year: 2023, Week: 15
Module Manufacturing Location: 1
SDRAM Manufacturer: SK Hynix
DRAM Steppping: N/A
Error Check/Correction: None
[Module Characteristics]
Rank Mix: Symmetrical
Row Address Bits: 16
Column Address Bits: 10
Module Density: 16384 Mb
Dies Per Package: 1
Device Width: x8
Number Of Bank Groups: 8
Banks Per Group: 4
Number Of Ranks: 2
Module Device Width: x4
Channels Per DIMM: x2
Primary Bus Width: x32
Bus Extension: None
Module Voltage (VDD): Nominal: 1.1V, Operable: 1.1V, Endurant: 1.1V
Module Voltage (VDDQ): Nominal: 1.1V, Operable: 1.1V, Endurant: 1.1V
Module Voltage (VPP): Nominal: 1.8V, Operable: 1.8V, Endurant: 1.8V
Wide Temperature Sense: Supported
Bounded Fault: Supported
BL32: Supported
Non-Standard Core Timings: Not Supported
Minimum SDRAM Cycle Time (tCKAVGmin): 0.41600 ns (2400 MHz)
Maximum SDRAM Cycle Time (tCKAVGmax): 1.01000 ns
CAS# Latencies Supported: 22, 26, 28, 30, 32, 36, 40, 42
Minimum CAS# Latency Time (tAAmin): 16.666 ns
Minimum RAS# to CAS# Delay (tRCDmin): 16.666 ns
Minimum Row Precharge Time (tRPmin): 16.666 ns
Minimum Active to Precharge Time (tRASmin): 32.000 ns
Supported Module Timing at 2400.0 MHz: 41-41-41-77
Supported Module Timing at 2200.0 MHz: 37-37-37-71
Supported Module Timing at 1800.0 MHz: 31-31-31-58
Supported Module Timing at 1600.0 MHz: 27-27-27-52
Minimum Active to Active/Refresh Time (tRCmin): 48.666 ns
Minimum Refresh Recovery Time Delay (tRFC1min): 295.000 ns
Minimum Refresh Recovery Time Delay (tRFC2min): 160.000 ns
Minimum Refresh Recovery Time Delay (tRFCsbmin): 130.000 ns
Minimum Refresh Recovery Time Delay (tRFC1dlrmin): 0.000 ns
Minimum Refresh Recovery Time Delay (tRFC2dlrmin): 0.000 ns
Minimum Refresh Recovery Time Delay (tRFCsbdlrmin): 0.000 ns
Activate to Activate Command Delay for Same Bank Group (tRRD_L): 5.000 ns
Read to Read Command Delay for Same Bank Group (tCCD_L): 5.000 ns
Write to Write Command Delay for Same Bank Group (tCCD_L_WR): 20.000 ns
Write to Write Command Delay for Same Bank Group, Second Write not RMW (tCCD_L_WR2): 10.000 ns
Four Activate Window (tFAW): 16.666 ns
Write to Read Command Delay for Same Bank Group (tCCD_L_WTR): 10.000 ns
Write to Read Command Delay for Different Bank Group (tCCD_S_WTR): 2.500 ns
Read to Precharge Command Delay (tRTP): 7.500 ns
SPD Manufacturer: Montage Technology Group
SPD Type: SPD5118
SPD Steppping: 1.5
PMIC0 Device: Present
PMIC0 Manufacturer: Richtek Power
PMIC0 Device Type: PMIC5100
PMIC0 Stepping: 1.1
PMIC0 Type: Small PMIC (Low Current)
PMIC0 Secure Mode: Disabled
Thermal Sensor 0: Not Present
Thermal Sensor 1: Not Present
DRAM Temperature Grade: Extended (XT) : 0 - 95 C
Heat Spreader: Not Present
Module Nominal Height: 31 - 32 mm
Module Maximum Thickness (Front): 1 - 2 mm
Module Maximum Thickness (Back): <= 1 mm
[Intel Extreme Memory Profile (XMP)]
XMP Version: 3.0
Number of PMICs: 1
XMP(OC) PMIC: Supported
PMIC OC: Enabled
PMIC voltage default step size: 10 mV
[Enthusiast/Certified Profile [Enabled]]
Profile Name:
Recommended Channel Config: 1 DIMM per Channel
Module VDD Voltage Level: 1.40 V
Module VPP Voltage Level: 1.80 V
Module VDDQ Voltage Level: 1.40 V
Memory Controller Voltage Level: 1.40 V
Minimum SDRAM Cycle Time (tCKAVGmin): 0.31200 ns (3200 MHz)
CAS# Latencies Supported: 32
Minimum CAS# Latency Time (tAAmin): 9.984 ns
Minimum RAS# to CAS# Delay (tRCDmin): 12.187 ns
Minimum Row Precharge Time (tRPmin): 12.187 ns
Minimum Active to Precharge Time (tRASmin): 30.000 ns
Supported Module Timing at 3200.0 MHz: 32-40-40-97
Minimum Active to Active/Refresh Time (tRCmin): 42.187 ns
Minimum Refresh Recovery Time Delay (tRFC1min): 295.000 ns
Minimum Refresh Recovery Time Delay (tRFC2min): 160.000 ns
Minimum Refresh Recovery Time Delay (tRFCsb): 130.000 ns
Minimum Minimum Write Recovery Time (tWRmin): 30.000 ns
System Command Rate Mode: Default
Real-Time Memory Frequency Overclocking: Supported
Intel Dynamic Memory Boost: Not Supported
Row: 3 [P0 CHANNEL B/DIMM 1] - 32 GB PC5-51200 DDR5 SDRAM GeIL CL32-39-39 D5-6400
[General Module Information]
Module Number: 3
Module Size: 32 GBytes
Memory Type: DDR5 SDRAM
Module Type: Unbuffered DIMM (UDIMM)
Memory Speed: 3200.0 MHz (DDR5-6400 / PC5-51200)
Module Manufacturer: GeIL
Module Part Number: CL32-39-39 D5-6400
Module Revision: 0.0
Module Serial Number: N/A
Module Manufacturing Date: Year: 2023, Week: 15
Module Manufacturing Location: 1
SDRAM Manufacturer: SK Hynix
DRAM Steppping: N/A
Error Check/Correction: None
[Module Characteristics]
Rank Mix: Symmetrical
Row Address Bits: 16
Column Address Bits: 10
Module Density: 16384 Mb
Dies Per Package: 1
Device Width: x8
Number Of Bank Groups: 8
Banks Per Group: 4
Number Of Ranks: 2
Module Device Width: x4
Channels Per DIMM: x2
Primary Bus Width: x32
Bus Extension: None
Module Voltage (VDD): Nominal: 1.1V, Operable: 1.1V, Endurant: 1.1V
Module Voltage (VDDQ): Nominal: 1.1V, Operable: 1.1V, Endurant: 1.1V
Module Voltage (VPP): Nominal: 1.8V, Operable: 1.8V, Endurant: 1.8V
Wide Temperature Sense: Supported
Bounded Fault: Supported
BL32: Supported
Non-Standard Core Timings: Not Supported
Minimum SDRAM Cycle Time (tCKAVGmin): 0.41600 ns (2400 MHz)
Maximum SDRAM Cycle Time (tCKAVGmax): 1.01000 ns
CAS# Latencies Supported: 22, 26, 28, 30, 32, 36, 40, 42
Minimum CAS# Latency Time (tAAmin): 16.666 ns
Minimum RAS# to CAS# Delay (tRCDmin): 16.666 ns
Minimum Row Precharge Time (tRPmin): 16.666 ns
Minimum Active to Precharge Time (tRASmin): 32.000 ns
Supported Module Timing at 2400.0 MHz: 41-41-41-77
Supported Module Timing at 2200.0 MHz: 37-37-37-71
Supported Module Timing at 1800.0 MHz: 31-31-31-58
Supported Module Timing at 1600.0 MHz: 27-27-27-52
Minimum Active to Active/Refresh Time (tRCmin): 48.666 ns
Minimum Refresh Recovery Time Delay (tRFC1min): 295.000 ns
Minimum Refresh Recovery Time Delay (tRFC2min): 160.000 ns
Minimum Refresh Recovery Time Delay (tRFCsbmin): 130.000 ns
Minimum Refresh Recovery Time Delay (tRFC1dlrmin): 0.000 ns
Minimum Refresh Recovery Time Delay (tRFC2dlrmin): 0.000 ns
Minimum Refresh Recovery Time Delay (tRFCsbdlrmin): 0.000 ns
Activate to Activate Command Delay for Same Bank Group (tRRD_L): 5.000 ns
Read to Read Command Delay for Same Bank Group (tCCD_L): 5.000 ns
Write to Write Command Delay for Same Bank Group (tCCD_L_WR): 20.000 ns
Write to Write Command Delay for Same Bank Group, Second Write not RMW (tCCD_L_WR2): 10.000 ns
Four Activate Window (tFAW): 16.666 ns
Write to Read Command Delay for Same Bank Group (tCCD_L_WTR): 10.000 ns
Write to Read Command Delay for Different Bank Group (tCCD_S_WTR): 2.500 ns
Read to Precharge Command Delay (tRTP): 7.500 ns
SPD Manufacturer: Montage Technology Group
SPD Type: SPD5118
SPD Steppping: 1.5
PMIC0 Device: Present
PMIC0 Manufacturer: Richtek Power
PMIC0 Device Type: PMIC5100
PMIC0 Stepping: 1.1
PMIC0 Type: Small PMIC (Low Current)
PMIC0 Secure Mode: Disabled
Thermal Sensor 0: Not Present
Thermal Sensor 1: Not Present
DRAM Temperature Grade: Extended (XT) : 0 - 95 C
Heat Spreader: Not Present
Module Nominal Height: 31 - 32 mm
Module Maximum Thickness (Front): 1 - 2 mm
Module Maximum Thickness (Back): <= 1 mm
[Intel Extreme Memory Profile (XMP)]
XMP Version: 3.0
Number of PMICs: 1
XMP(OC) PMIC: Supported
PMIC OC: Enabled
PMIC voltage default step size: 10 mV
[Enthusiast/Certified Profile [Enabled]]
Profile Name:
Recommended Channel Config: 1 DIMM per Channel
Module VDD Voltage Level: 1.40 V
Module VPP Voltage Level: 1.80 V
Module VDDQ Voltage Level: 1.40 V
Memory Controller Voltage Level: 1.40 V
Minimum SDRAM Cycle Time (tCKAVGmin): 0.31200 ns (3200 MHz)
CAS# Latencies Supported: 32
Minimum CAS# Latency Time (tAAmin): 9.984 ns
Minimum RAS# to CAS# Delay (tRCDmin): 12.187 ns
Minimum Row Precharge Time (tRPmin): 12.187 ns
Minimum Active to Precharge Time (tRASmin): 30.000 ns
Supported Module Timing at 3200.0 MHz: 32-40-40-97
Minimum Active to Active/Refresh Time (tRCmin): 42.187 ns
Minimum Refresh Recovery Time Delay (tRFC1min): 295.000 ns
Minimum Refresh Recovery Time Delay (tRFC2min): 160.000 ns
Minimum Refresh Recovery Time Delay (tRFCsb): 130.000 ns
Minimum Minimum Write Recovery Time (tWRmin): 30.000 ns
System Command Rate Mode: Default
Real-Time Memory Frequency Overclocking: Supported
Intel Dynamic Memory Boost: Not Supported
10-13-2023 09:53 AM - edited 10-14-2023 07:32 AM
10-14-2023 07:24 AM
I came back with the version that is stable for me, AGESA 1.0.0.7a. I did not obtain stability with the new AGESA 1.0.8.0, on the contrary, regardless of my optimization attempts, the memories demonstrated instability at some point, therefore, artifacts appeared within the BIOS or corruption of the Windows 11 kernel.
the images below are from AGESA 1.0.0.7a. I note that there are settings in this version where certain parameters return to automatic mode, no matter how much I try to leave it as [enable].
In the performance tests that I was able to run with both versions, I observed that the old one is also the best performing in everything.
It's important to note that I disabled the SoC overclocking option.
cachemem
ZenTimings_AGESA1.0.0.7a
AI TWEAKER 02
AI TWEAKER 03
AMD CBS
AMD CBS1
AUDIO CONFIGURATION
CORE FLEX ALGORITHM
DDR ADDRESSING OPTIONS
DDR BUS CONFIGURATION
DDR MEMORY FEATURES
DDR MEMORY MBIST
DDR POWER OPTIONS
DDR SECURITY
DDR TIMING CONTROL 01
DDR TIMING CONTROL 02
DDR TIMING CONTROL 03
DDR TIMING CONTROL 04
DDR TIMING CONTROL 05
DDR TRAINING
DF COMMON OPTIONS
DIGI PLUS VRM
NBIO COMMON OPTIONS
PREFETCH SETTINGS
SMU COMMON OPTIONS
SMU COMMON OPTIONS1
TWEAKERS PARADISE