Crosshair VII Hero Essential Info Thread

[gupsterg]

Last update: 17/11/18

Last 3 updates to OP:-

i) Added section Is the lack of ASUS T-Topology an issue on C7H?

ii) Added section To use manual OC or Precision Boost Override? (see post 3)

iii) ASUS PE section has new link to post by The Stilt on his tweak in PE3/4.

ROG Crosshair VII Hero
Essential Info Thread



by Elmor

Ryzen: Strictly technical - Chapter: Pinnacle Ridge By The Stilt

ZEN+ Delidded - Before/After Temperatures - [Ryzen 5, 7, 2600, 2700X] by Der8auer

ASUS CROSSHAIR VII HERO - Everything You Need To Know! X470 In Depth Review by Der8auer

Elmor's C7H UEFI folder link

PSA regarding C7H:-

Early batch of motherboards will exhibit an issue where [Auto] or manually set 1.05V for 1.05V SB voltage is shown as ~+50mV in UEFI readback box, SW monitoring in OS and on ProbeIt points. See the post by Elmor on OCN regarding this, link.

Do not use HWMonitor, it shows monitoring data which is not actually occurring, excessive CPU/RAM MHz, etc.

Preface

A C7H has been supplied to me by ASUS 😄 , courtesy of ASUS and Elmor :cool: . I do not work for ASUS or have any committent to them, I am just a "user" who has received a sample and doing what I would do if I had bought a C7H.

My plan is to expand OP to collate essential information for using this board. It will be gathered from web/user shares/own meddling. It will emulate some threads I did on OCN for Ryzen+C6H & TR+ZE; so do check back 🙂 .

Ryzen 2nd Gen "Pinnacle Ridge"





The C7H review by The Stilt

Original link, translated link.

• RAM Slots are daisy chain topology instead of ASUS T-Topology on C6H. Daisy chain favours 2 dimm slots/1DPC config.
  
• VRM 10+2 phases, 10 for VCORE, 2 for SOC, the mosfets have integrated temperature sensors.
  
• Six layer PCB.
  

Besides other information within review, I really liked the data on VRM information.



Is the lack of ASUS T-Topology an issue on C7H?

From my experience in some ways yes and no. I have found same CPU/RAM used on C6H you will have an easier ride with 4 dimms than C7H. I used Samsung B die single sided/ranked 8GB dimms.

A recent post by The Stilt highlighted how motherboard vendors can not tune firmware as they can on Intel platform (source link).

The worst memory related issue on this platform is that there is no way to tune the memory controller parameters. They are hard coded into the memory controller firmware (PMU) and cannot be changed by anyone but AMD. This prevents the manufacturers from optimizing the parameters specifically for their designs.

From what I have read in some detailed reviews is that AMD guidance on RAM tracing is daisy chain, so I would assume the firmware would be better tuned by AMD for that topology. Which favours the C7H as it uses daisy chain topology.

ASUS Performance Enhancer

Options within UEFI page Advanced > AMD CBS > NBIO Common Options > Precision Boost Override Configuration (Changed to XFR Enhancement in UEFI 1101). Precision Boost Override term is Precision Boost Overdrive. Some useful links to reference:-

• What each preset level of PE tweaks, link.
  
• Some further information from The Stilt on PE levels, link.
  
• Some further information from The Stilt on voltages seen when using PE, link.
  
• This linked post is also interesting on what the tweak within PE3/4 does.
  
  

  Even if you run 2700X with LN2 and disable all of the power / current limits, it will not boost higher than e.g. 4.35GHz for the best two cores of the CPU.
  
  4.35GHz for the best two cores of the CPU (marked with a golden and silver star in Ryzen Master), 4.2GHz for the rest (1-2C load).
  4.075GHz for all cores, unless limited by PPT, TDC, EDC, thermal or reliability (FIT). Clock reductions starts at 85°C (95°C tCTL), unless configured to a lower value.
  
  The power management must be reconfigured in order to allow higher frequencies, my "eXFR" ("Performance Enhancer" on ASUS boards) does just that.

  
  
  

ASUS Performance Enhancer/Precision Boost Override/Precision Boost Overdrive simply put allows a user of Ryzen to retain single core/thread boosting, but tweak nThread/Core boosting (ref above image).

You can also setup your own Performance Enhancer/Precision Boost Override Configuration (Changed to XFR Enhancement in UEFI 1101).

Note: Not available on Non X CPU.



PPT Limit - Package Power Tracking, watts limit CPU can use.

TDC Limit -Thermal Design Current, maximum current the VRM can supply to CPU, based on thermal aspect of VRM.

EDC Limit - Electrical Design Current, maximum peak current the VRM can supply to CPU, based on VRM components.

Precision Boost Overide Scalar - Increased scalar value relaxes voltage limiting rules of FIT monitoring.

These settings info is based on previous linked post plus quote below from The Stilt Ryzen: Strictly technical thread.

The "Precision Boost Override" feature available on 400-series motherboards allows increasing the physical limiters mentioned earlier. On SKUs belonging to the 105W TDP infrastructure group, the default limiters are following: PPT 141.75W, TDC 95A, EDC 140A and tJMax of 85°C (absolute, excl. offset).

When "Precision Boost Override" mode is enabled (AGESA default), PPT becomes essentially unrestricted (1000W), TDC is set to 114A and EDC to 168A. These limits can be customized by the ODM so that the new limits will comply with the electrical characteristics of the motherboard design in question.

Here is a link to a thread that people tinkering with PBO may find handy, link. Also below is images from Threadripper gen 2 launch slide deck with good info on PBO.



Which core is best?

As of HWINFO v5.83-3435 "Core Quality" is being shown, link to author's post. Perf #0 being best and highest # being worst. Latest Ryzen Master on Pinnacle Ridge only shows best core (denoted by gold star ) and second best (denoted by silver star).



BCLK Fluctuations?

Ryzen has no hardware to readback BCLK correctly. Now some owners of Ryzen/C7H may say I've never noted a fluctuation, there could be a few reasons to this.

• They have not captured it, as they did not have monitoring running at the time of event.
  
  
• Like HW, but differing samples can exhibit difference in fluctuation of BCLK readback. This is not limited to AMD CPUs without hardware to readback BCLK, but even Intel CPUs can exhibit this.
  
  
• They have correctly set up HWINFO for BCLK monitoring on CPUs without hardware for BCLK readback. When launching HWINFO pick settings, then untick option in below image highlighted in red.
  

So all in all what you set as BCLK in UEFI is what Ryzen/ASUS board will use and it is a steady frequency. This was confirmed in C6H thread at launch by Elmor who works in ASUS ROG MB R&D.

Which Prime95 to use?

The Stilt has advised v28.10 build 1 is best to use (link to app in this post), using custom setup of 128K 128K in place FFT will enable user to get correct CPU voltage setup. Then I use also custom setup of 8K 4096K with ~13GB RAM used out of 16GB (ie ~80% installed RAM); this will exercise the CPU/IMC/RAM.

How to test single or multiple cores?

Use HWINFO to identify core "Quality", perf #0 is best core and 7 is worst. Then ref below image on setting affinity and setup of P95. If using W10, in Task Manager click "Details" tab, find prime95.exe, right click and select "Set affinity" and you will see similar as screenie below.



Load Line Calibration!?

This cropped ups pretty much daily. The problem I think is there are far too many youtube video where you have x person setting y voltage on a board and then saying ahh look it drooped to z. What they over look saying is there is a load line specification. Even a video I saw around Ryzen launch where Robert Hallock from AMD is feature skimmed over the subject with the usual nonsense. At least at the time we had The Stilt and Raja@ASUS to guide us 😉 .

Any how here we go with the info:-

i) Der8auer has a great video on the subject, link.

ii) AM4 LL spec by AMD and info on dLDO by The Stilt.

iii) LLC on C6H, link 2 by The Stilt (still relevant for C7H).

iv) How to calculate VDROOP by The Stilt.

So I set a 4.0GHz PState 0 and VID of 1.281V, stock LLC (ie [Auto]). In UEFI, which creates load on CPU (you'll see even when CPU default it will PB/XFR in UEFI), I saw ~1.274V steady on DMM applied to ProbeIt point. UEFI readback box was bouncing, at and ever so slightly below VID set.

In OS whilst I had P95 loading CPU with custom 128K 128K in place FFT I saw ~1.208V on DMM applied to ProbeIt point.



Light load (ie UEFI) VDROOP was less, as when CPU come off load it is not gonna overshoot wildly. Heavy load led to more VDROOP, which again makes sense. As when using stock LLC it should be this way, so I get less of an overshoot when CPU come off load vs increased LLC.

Below is a simple graphic to show load line effect and calibration.



What about CPU voltage!?

Many I time since moving to Ryzen I will see discussions based on when CPU is stock that (x)V is observed in usage, so CPU must be able to sustain that when OC'ing!?

To see what the actual maximum voltage FIT allows the CPU to run at in various different scenarios is, I disabled all of the other limiters and safe guards. With every other limiter / safe guard disabled, the reliability (FIT) becomes the only restrain. The voltage command which the CPU sends to the VRM regulator via the SVI2 interface and the actual effective voltage were then recorded in various scenarios. In stock configuration the sustained maximum effective voltage during all-core stress allowed by FIT was =< 1.330V. Meanwhile, in single core workloads the sustained maximum was =< 1.425V. When the “FIT� parameters were adjusted by increasing the scalar value from the default 1x to the maximum allowed value of 10x, the maximum all-core voltage became 1.380V, while the maximum single core voltage increased to 1.480V. The recorded figures appear to fall very well in line with the seen and known behavior, frequency, power and thermal scaling wise.

The seen behaviour suggests that the full silicon reliability can be maintained up to around 1.330V in all-core workloads (i.e. high current) and up to 1.425V in single core workloads (i.e. low current). Use of higher voltages is definitely possible (as FIT will allow up to 1.380V / 1.480V when scalar is increased by 10x), but it more than likely results in reduced silicon lifetime / reliability. By how much? Only the good folks at AMD who have access to the simulation data will know for sure.

Quote source link

What should SOC voltage be set to!?

The C7H increases SOC when left on [Auto] based on "auto rule" not an "auto determination" of silicon characteristics. Increasing RAM past official speeds makes this occur. Best is to tune SOC as required. The Stilt experience quoted below.

There are clear differences in how the memory controller behaves on the different CPU specimens. The majority of the CPUs will do 3466MHz or higher at 1.050V SoC voltage, however the difference lies in how the different specimens react to the voltage. Some of the specimens seem scale with the increased SoC voltage, while the others simply refuse to scale at all or in some cases even illustrate negative scaling. All of the tested samples illustrated negative scaling (i.e. more errors or failures to train) when higher than 1.150V SoC was used. In all cases the maximum memory frequency was achieved at =< 1.100V SoC voltage.

I have found my R7 2700X (Batch: UA 1805SUS) scales this way for SOC:-

3200MHz set to 0.900V in UEFI (Tested using The Stilt Safe 3200MHz timings preset but TRC 44 & TRFC 256)
3333MHz set to 0.912V in UEFI (Tested using The Stilt Fast 3333MHz timings preset)
3400MHz set to 0.925V in UEFI (Tested using The Stilt Fast 3466MHz timings preset)
3466MHz set to 0.956V in UEFI (Tested using The Stilt Fast 3466MHz timings preset) Note: If CPU stock
3466MHz set to 0.968V in UEFI (Tested using The Stilt Fast 3466MHz timings preset) Note: CPU PState 0 OC 4.1GHz

All testing above so far on UEFI 0601, RAM used F4-3200C14D-16GTZ, CPU was stock. I found at UEFI defaults the SOC was ~0.800V, I just picked 0.900V for my starting point. Perhaps 3200MHz could be attained with less SOC on my CPU, I may test this at later stage.

Is RAM MHz king?

As with Summit Ridge, Pinnacle Ridge also at >3200MHz RAM timings play a bigger role than frequency. This article pits The Stilt's 3466MHz preset found in "DRAM Timings Control" of UEFI against upto 3600MHz C16.

What RAM to get?

Samsung B Die single rank/sided is the most favoured RAM IC for Ryzen, in useful links is a thread with helpful info when making a purchase. In regard to QVL I share The Stilt's opinion, link. I have used non QVL RAM with C6H, ZE and plan to do so with C7H. There are many user shares of having bought QVL listed RAM and not gaining higher speeds. Reference below image to know what is OC RAM speed on Ryzen.

Ryzen gen 1 officially supported max 2666MHz for single rank/sided in 1 dimm per channel configuration, gen 2 is 2933MHz. This increase may have been gained by tweaks to silicon and or AGESA, or perhaps eaten into OC headroom, I have no idea. In a nutshell I'd say keep expectations realistic, higher density RAM usage equals lower attainable MHz, generally speaking. Be prepared to put in some time and effort to gain higher speed RAM. Below is a table from Ryzen gen 1 reviewers guide, but with added gen 2 officially supported RAM MHz info.



Note: Only SR config has gained increased RAM MHz officially, this information was confirmed via another mobo maker and consulted The Stilt.

Testing RAM stability?

HCI Memtest and GSAT have been mainly what I have used. Little while back a new app has hit the scene, RAM Test by Karhu Software. This app was developed with the support of Ryzen owners on a Finnish forum. When I read The Stilt approved of this app that was all I needed to know to recommend it also. There is also a thread on OCN regarding this app, link.

Below listed sections moved to post 3:-

RAM Timings Info

How to use Flashback (ie updating motherboard UEFI)

How many ways does the board post!?

Some of what I do with OC'ing

Creating Window 7 ISO with drivers for usage on C7H

FAQ

Useful Links

[Raja]

Sticky.

[gupsterg]

RAM Timings Info

This section will be aimed not to be "explain all" on RAM timings 😉 . I'm keeping to just as I'd like, a simple "I wanna know what becomes what if I change x to y" 🙂 .

The timings are in the order of as found in UEFI DRAM Timings Control/Ryzen Timings Checker by The Stilt.

tCL if set to odd value will need GearDown to be disabled, otherwise it is rounded to even value automatically.

tRCDWR aim to match with tCL and lower as much as you can, increased values above tCL may help stability for targeted RAM MHz.

tRCDRD aim to match with tCL and lower as much as you can, increased values above tCL may help stability for targeted RAM MHz.

tRP aim to match with tCL and lower as much as you can, increased values above tCL may help stability for targeted RAM MHz.

tRAS = tCL + tRCD + tRTP (See note 1 at end)

tRC = tRAS + tRP (See note 1 at end)

tRDDS ???

tRDDL ???

tFAW = lowest it can be is 4x tRRD_S (See note 1 at end)

tFAWDLR and tFAWSLR should be 0.

tWTRS ???

tWTRL ???

tWR aim for 10 to 12, I have had 10 on setup with tightened other settings (this is tightest it can be). Increasing should aid stability for targeted RAM MHz, see also Raja's post here.

tRCPage should be 0.

tRDRDSCL aim for 2, increasing should aid stability for targeted RAM MHz (linked to tWRWRSCL see note 2 at end).

tWRWRSCL aim for 2, increasing should aid stability for targeted RAM MHz (linked to tRDRDSCL see note 2 at end).

tRFC AFAIK has no rule, tRFC 2 and 4 ignore and leave on [Auto], this was guidance from The Stilt within C6H thread (link in this post).

tCWL match to tCL, if tCL is odd then select -1 from it to be even value. Odd tCWL does not apply when I have tried.

tRTP aim for 8, I have had 5 on setup (this is the tightest it can be set). Increasing should aid stability for targeted RAM MHz, see also Raja's post here.

tRDWR = ??? 1/2 x tWTRL

tWRRD = ??? 1/2 x tRDWR

tWRWRSC set as 1 (linked to tRDRDSC see note 2 at end).

tWRWRSD and tWRWRDD match to each other, I have managed to knock these from 7 to 5, but did not see any gains in performance (See note 2 at end).

tRDRDSC set as 1 (linked to tWRWRSC see note 2 at end).

tRDRDSD and tRDRDD match to each other, I have managed to knock these from 5 to 3, but did not see any gains in performance (See note 2 at end).

tCKE Been using 6 or 9, but can be left on [Auto] I will link the posts by The Stilt and Raja@ASUS in C6H thread, but for now see info here.

Note 1: It being looser than calc can aid stability.

Note 2: Some of the timings relationship can be seen within AIDA64, link.

How to use Flashback (ie updating motherboard UEFI)

Note: Flashback will allow you to flash any UEFI you would like featuring support for your board, regardless what version it is, AGESA version, etc, etc.

My procedure.

i) Change UEFI filename as C7H.CAP or C7HWIFI.CAP depending on your model.

ii) Copy to USB stick, it must be formatted to FAT32. File must not be in a directory.

iii) Load UEFI defaults prior to doing flashback and let mobo repost and shutdown.

iv) Make sure USB stick is in Flashback port (marked in red box below image)



v) Press and hold the Flashback button (blue box, above image) ~5secs. Blue LED on the button will flash slow for a few seconds and quicken as it starts update process. At the end of process it will extinguish, you are ready to boot up. If the blue LED stays constant the UEFI file was not found on USB stick, so check USB stick is correct format and filename is correct.

Other things that can be referenced for procedure of using flashback below

i) Current CROSSHAIR VII HERO Web manual, page 57 of PDF, section 2.2 BIOS update utility.

ii) Current CROSSHAIR VII HERO WIFI web manual, page 58 of PDF, section 2.2 BIOS update utility.

iii) http://event.asus.com/2012/mb/USB_BIOS_Flashback_GUIDE/

How many ways does the board post!?

The board posts in 4 differing methods AFAIK.

i) prior to board posting from shutdown if power supply did not have power from wall socket. Multiple posts can occur from this type of POST, see FAQ.

ii) prior to board posting from shutdown if power supply had power from wall socket.

iii) reset/restarted whilst powered.

iv) resumed from sleep state.

For lengthy while it was not possible to use post method (i) with greater than 2666MHz on C6H.

For lengthy while I used post method (iv) on C6H as greater than 2666MHz I used to encounter rare intermittent memory training failure.

As AGESA/UEFI developed same combined HW had no issues. I'm assuming you could add a fifth post method, Windows Fast Startup. You'll note the Q-Code display will show a 40 instead of 30 or 24. 30 is denoting resume from usual sleep and 24 "fresh" post.

Some of what I do with OC'ing

I will always setup a base profile and save it. Usually this default CPU/RAM setup but has settings acting as "foundation" for OC profile.

I'll set on Extreme Tweaker page:-

Ai Overclock Tuner [Manual]
BCLK Frequency [100.0000]
Performance Enhancer [Default]
Performance Bias [None]
Core Performance Boost [Enabled]
SMT Mode [Enabled]
1.8V PLL Voltage [1.80000]
1.05V SB Voltage [1.05000]

I'll set on DRAM Timings Control page:-

Cmd2T [1T]
Gear Down Mode [Disabled]
Power Down Enable [Disabled]

I'll set on External Digi+ Power Control page:-

VRM Spread Spectrum [Disabled]

I'll set on Tweaker's Paradise page:-

Sense MI Skew [Disabled]

I'll set on Advanced page, AMD CBS, Zen Common Options:-

Global C-state Control [Enabled]

Anything else is basically preference on fans, onboard devices setup, etc.

Next I'll talk about an OC setup. My preference is usually to do PState 0 OC in UEFI. So first on Extreme Tweaker page I knock out:-

Core Performance Boost [Disabled]

Then I'll go to Advanced > AMD CBS > Zen Common Options > Custom PStates / Throttling. Here I will adjust :-

Custom Pstate0 [Custom]
Pstate0 FID [a6]
Pstate0 DID [8]
Pstate0 VID [1f]

When change FID, in the greyed box Frequency (MHz) you will see target MHz for ceiling of state. Like wise when VID is changed you will see target VID in Voltage (uV). Input of settings in hexadecimal.

I would then save this profile as 4.15GHz Base Profile. I would go to OS and run P95 v28.10b1, 128K 128K in place FFT. As suggested by The Stilt's posts this will load the CPU and allow you to test if VID is correctly set.

Next I'd move onto setting up RAM OC. I'd go to DRAM Timings Control > Memory Presets and pick :-

Load The Stilt 's 3466MHz 1.4V 2xSamsung B-Die Single Side Profile

Next on Extreme Tweaker page I'd set:-

Memory Frequency [DDR4-3466MHz]
CPU SOC Voltage [Manual mode]
- VDDSOC Voltage Override [1.06250]
DRAM Voltage [1.35000]

And in External Digi+ Power Control page set:-

DRAM VBoot Voltage [1.35000]

This would become my 4.15GHz 3466MHz The Stilt setup, this ZIP contains:-

) 3 runs each of AIDA64, CPU-Z, CB15, 3DM Skydiver Physics benches. All are no OS/Performance bias tweaks.

ii) UEFI settings txt, this is a very "plug'n'play" profile for my HW, minimal changes from UEFI defaults/[Auto].

iii) HWINFO screenie where I have P95 v28.10b1 (128K 128K in place FFT) loading CPU and measured DMM voltages for VCORE, SOC and VDIMM marked on it. HWINFO polling interval 750ms.

iv) Some OS info like PowerPlan, etc. It's just W7P x64 installed from ISO as guided to make in ROG C7H thread. No OS tweaks, etc, so is "daily usage", etc.

I'm continuing further testing of this profile for stability and will update what goes on with these initial settings.

To use manual OC or Precision Boost Override?

I believe this maybe CPU to CPU dependent case. So far I have owned 2x 2700X, batch 1805 SUS and 1825 SUS. As 1805 SUS had seemed not to gain much with PE/PBO tweaks I set about using PState 0 OC. Using VID of 1.318V it would hold 4.1GHz in P95 v28.10b1 128K in place FFT test, 4.15GHz with 1.387V. 1825 SUS needed only 1.268V for 4.1GHz in same test. It seemed to do much better with stock setup on voltage used for 8K 4096K high RAM usage setup as well.

Below link to image, it's a rough compare. Left is 1805 SUS stock (ie PE: [Default], centre is 1825 SUS same setup, right is 1825 SUS PE: Default PBO: Enabled. HWINFO is set to same polling interval, room ambient differed from left screenie to centre/right, use other sensor temps to gauge difference.

> Triple screenie link <

So on left screenie 1805 SUS boosted to average of 3.975GHz using 1.294V (SVI2 VCORE). Same setup on 1825 SUS (centre screenie) results in average boost of 3.95GHz using 1.2V. As 1805 SUS was IMO gaining weak gains using PE/PBO I didn't take time to record benches. 1825 SUS with PE: Default and PBO: Enabled matches say 4.1GHz PState 0 OC on 1805 SUS, but in some cases beats it and definitely on single core kills it. Now on right we see under P95 it averages 4.09GHz using 1.311V.

All in all I feel on 1825 SUS using PE/PBO is better on single core, matches or bests multi core of when 1805 SUS was 4.1GHz PState 0.

I believe 1805 SUS was lower leakage CPU, as it used high VCORE and gained less clocks. 1825 SUS is seeming like a higher leakage CPU as uses less VCORE for same or more MHz.

Creating Window 7 ISO with drivers for usage on C7H

Links to essential "tools" :- i) NTLite ii) Rufus

Link to driver pack

Note:- The zip is made up of drivers from:-

i) AMD Chipset driver pack from AMD site.
ii) Realtek RTL8822BE drivers are from Realtek, (link).
iii) ASMedia chipset drivers are from ZIP shared by Elmor (link in post 1).

Link:- Video on creating ISO

So far I am adding only:-

i) KB3177467 (Servicing stack update for Windows 7 SP1 and Windows Server 2008 R2 SP1: September 20, 2016, link)
ii) KB3125574 (Convenience rollup update for Windows 7 SP1 and Windows Server 2008 R2 SP1, link)

(Note: KB3020369 is not needed as highligted in prerequisites on page of KB3125574 as KB3177467 replaced/supersedes KB3020369).

After W7 is installed the Realtek RTL8822BE will still not be installed, but the drivers are there in OS to install manually (shown in YT video at end).

Links to essential "tools" for keeping W7 "clean":- i) GWX Control Panel ii) WUFUC

FAQ

Q: HPET and Spread Spectrum option not in UEFI?
A: The reason for this can be found in a post by The Stilt on OCN, link.

Q: CPU is not downvolting when OC'd on later AGESA UEFI?
A: Please read explanation by Elmor, link.

Q: Do I need do use ATX 4 pin and EPS 8 pin power plugs on motherboard?
A: No, the EPS 8 pin is ample, ATX 4pin & EPS 8 pin are wired in parallel to power plane.

Q: Why do I see CPU temperature bounce?
A: Ryzen has ~20 on die temperature sensors, some rotating goes on and highest value is shown.

Q: Do the erratic CPU temperature bounce my fans spin up/down erratically, is there a solution?
A: Each fan header in UEFI allows "Fan Smoothing", increase the value to gain smoother fan operation.

Q: What are the temperature limits at stock and when using PE/PBO/OC?
A: Stock 85°C target temperature, 115°C shutdown temperature. When target temperature is reached throttling occurs, in OC mode only shutdown temperature applies, link.

Q: Max VDIMM?
A: ~1.5V, link.

Q: SW Monitoring causes my fan headers to behave erratically or rig shutdown?
A: Use latest HWINFO / AIDA64 with latest UEFIs, ASUS are or have rolled out new ASUS WMI for SW to interface with to resolve issues with Super IO chip, link to a informative post.

Q: When power is removed from power supply, multiple posts occur, is this a problem with board/settings?
A: When power is removed from board (ie PSU has power switched off) the multiple posts are needed to setup the EC. How many times the board posts does depend on settings.

For example for 3466MHz my C6H and ZE need 2 posts, my C7H is 3.

IF these multiple posts were memory training fails, you usually would:-

i) hear high pitch "triple beep" on mobo speaker (if connected) and just as board resets memory setup a single beep with differing tone to normal post is heard.

ii) have a Q-Code: F9.

I will add a post ASAP by Raja@ASUS concerning how these multiple post are used to setup board, but for now reference this thread and especially post 8.

Q: What is SOC overclock VID found in AMD CBS?
A: The Stilt's post link, CJMitsuki hex values share, link.

Useful Links

ROG announces new X470 motherboards for next-gen Ryzen processors

The Dark Hero wallpaper by Raja@ASUS

ASUS TurboV Core v1.02.02 (I've used on C6H/C7H/ZE)

Ryzen Memory IC Collection Thread

Community Update #4: Let's Talk DRAM! (Useful info on DRAM timings)

Thaiphoon Burner (App that gets detailed info on RAM sticks in use, video link)

Ryzen Timings Checker by The Stilt

ASUS ZenStates by Elmor

The Stilt's Hynix AFR & MFR Single sided/rank timings

Ryzen DRAM Calculator by 1usmus (This DDR4 OC guide is also handy, link)

If you own HCI Memtest:-

Program to launch many instances, etc of HCI Memtest by OCN member Frikencio

Program to launch many instances, etc of HCI Memtest by OCN member Bartouille.

StatusCore (Great app to see 1T/nT core MHz easily)

Y-Cruncher (Stability test app, some tests create large loads)

Prime95 v28.10 build1 (Recommended by The Stilt for use on Ryzen, I see ~10% greater load with this version vs later releases)

Prime95 v28.10 build 1 for Linux 32bit, 64bit

Intel Memory Latency Checker (FOC handy program to see latency, etc)

ASUS WMI driver for Linux by electrified, link

[ZEEED]

Wassup gupsterg Ill stick around here also then.
Also Super happy after Asus Upgraded me to C7H what a fantastic BOARD 🙂

[gupsterg]

ZEEED wrote:
Wassup gupsterg Ill stick around here also then.
Also Super happy after Asus Upgraded me to C7H what a fantastic BOARD 🙂

Hi 🙂 , sweet :cool: .

akarabamba wrote:
Can i remove the backplate of the cpu if i want to install a cooler that requires it's own am4 brackets or is it fixed?
Thanks.

It is not fixed, once you remove the screws for clips on front side the backplate on rear will release.

[akarabamba]

gupsterg wrote:
Hi 🙂 , sweet :cool: .



It is not fixed, once you remove the screws for clips on front side the backplate on rear will release.

Thanks a lot for the answer.

[akarabamba]

Can i remove the backplate of the cpu if i want to install a cooler that requires it's own am4 brackets or is it fixed?
Thanks.

[danjw]

gupsterg wrote:
Last update: 06/05/18
Ryzen Memory IC Collection Thread

This link is broken. It is just the text, no URL.

[gupsterg]

Thanks 🙂 , error on my part and resolved by you highlighting 🙂 .

[gorpo]

Great post and thanks for keeping it updated.

Would it be possible to note linux compatibility of the testing software mentioned and/or suggesting linux alternatives?